HD6433644R datasheet(42/549 Pages) RENESAS

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Section 2 CPU

Rev. 6.00 Sep 12, 2006 page 22 of 526

REJ09B0326-0600

2.3.2

Memory Data Formats

Figure 2.4 indicates the data formats in memory. For access by the H8/300L CPU, word data

stored in memory must always begin at an even address. When word data beginning at an odd

address is accessed, the least significant bit is regarded as 0, and the word data beginning at the

preceding address is accessed. The same applies to instruction codes.

Data Format

76543210

Address

Data Type

Address n

MSB

LSB

MSB

LSB

Upper 8 bits

Lower 8 bits

MSB

LSB

CCR

CCR*

MSB

LSB

MSB

LSB

Address n

Even address

Odd address

Even address

Odd address

Even address

Odd address

1-bit data

Byte data

Word data

Byte data (CCR) on stack

Word data on stack

Legend:

CCR:

Condition code register

Note: * Ignored on return

Figure 2.4 Memory Data Formats

When the stack is accessed using R7 as an address register, word access should always be

performed. The CCR is stored as word data with the same value in the upper 8 bits and the lower 8

bits. On return, the lower 8 bits are ignored.

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