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HD6433644R Datasheet(PDF) 71 Page - Renesas Technology Corp |
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HD6433644R Datasheet(HTML) 71 Page - Renesas Technology Corp |
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71 / 549 page ![]() Section 2 CPU Rev. 6.00 Sep 12, 2006 page 51 of 526 REJ09B0326-0600 Interrupt vector area (48 bytes) On-chip ROM On-chip RAM Internal I/O registers (96 bytes) Internal I/O registers (16 bytes) Reserved 1,024 bytes H'0000 H'002F H'0030 H'7FFF H'F770 H'F77F H'FB80 H'FF7F H'FF80 H'FF9F H'FFA0 H'FFFF Word Byte Access States 2 or 3* 2 —— — —— 3* 2 ——— × — Reserved Reserved Notes: The H8/3644 is shown as an example. * Internal I/O registers in areas assigned to timer X (H'F770 to H'F77F), SCI3 (H'FFA8 to H'FFAD), and timer V (H'FFB8 to H'FFBD) are accessed in three states. × Figure 2.17 Data Size and Number of States for Access to and from On-Chip Peripheral Modules |
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