HD6433644R datasheet(72/549 Pages) RENESAS

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Section 2 CPU

Rev. 6.00 Sep 12, 2006 page 52 of 526

REJ09B0326-0600

2.9.2

Notes on Bit Manipulation

The BSET, BCLR, BNOT, BST, and BIST instructions read one byte of data, modify the data,

then write the data byte again. Special care is required when using these instructions in cases

where two registers are assigned to the same address, in the case of registers that include write-

only bits, and when the instruction accesses an I/O port.

Order of Operation

Operation

Read

Read byte data at the designated address

Modify

Modify a designated bit in the read data

Write

Write the altered byte data to the designated address

Bit Manipulation in Two Registers Assigned to the Same Address

Example 1: timer load register and timer counter

Figure 2.18 shows an example in which two timer registers share the same address. When a bit

manipulation instruction accesses the timer load register and timer counter of a reloadable timer,

since these two registers share the same address, the following operations take place.

Order of Operation

Operation

Read

Timer counter data is read (one byte)

Modify

The CPU modifies (sets or resets) the bit designated in the instruction

Write

The altered byte data is written to the timer load register

The timer counter is counting, so the value read is not necessarily the same as the value in the

timer load register. As a result, bits other than the intended bit in the timer load register may be

modified to the timer counter value.

Read

Write

Count clock

Timer counter

Timer load register

Reload

Internal bus

Figure 2.18 Timer Configuration Example

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