HD6433644R datasheet(12/549 Pages) RENESAS

12 / 549 page

Rev. 6.00 Sep 12, 2006 page xii of xx

2.7.4

Exception-Handling State .................................................................................... 48

2.8

Memory Map..................................................................................................................... 49

2.9

Application Notes ............................................................................................................. 50

2.9.1

Notes on Data Access .......................................................................................... 50

2.9.2

Notes on Bit Manipulation................................................................................... 52

2.9.3

Notes on Use of the EEPMOV Instruction .......................................................... 58

Section 3 Exception Handling ......................................................................................... 59

3.1

Overview........................................................................................................................... 59

3.2

Reset59

3.2.1

Overview.............................................................................................................. 59

3.2.2

Reset Sequence .................................................................................................... 59

3.2.3

Interrupt Immediately after Reset......................................................................... 61

3.3

Interrupts ........................................................................................................................... 61

3.3.1

Overview.............................................................................................................. 61

3.3.2

Interrupt Control Registers................................................................................... 63

3.3.3

External Interrupts................................................................................................ 71

3.3.4

Internal Interrupts................................................................................................. 72

3.3.5

Interrupt Operations ............................................................................................. 72

3.3.6

Interrupt Response Time...................................................................................... 77

3.4

Application Notes ............................................................................................................. 78

3.4.1

Notes on Stack Area Use...................................................................................... 78

3.4.2

Notes on Rewriting Port Mode Registers............................................................. 79

Section 4 Clock Pulse Generators................................................................................... 81

4.1

Overview........................................................................................................................... 81

4.1.1

Block Diagram ..................................................................................................... 81

4.1.2

System Clock and Subclock................................................................................. 81

4.2

System Clock Generator.................................................................................................... 82

4.3

Subclock Generator........................................................................................................... 84

4.4

Prescalers .......................................................................................................................... 85

4.5

Note on Oscillators............................................................................................................ 86

Section 5 Power-Down Modes ........................................................................................ 87

5.1

Overview........................................................................................................................... 87

5.1.1

System Control Registers ..................................................................................... 90

5.2

Sleep Mode ....................................................................................................................... 94

5.2.1

Transition to Sleep Mode..................................................................................... 94

5.2.2

Clearing Sleep Mode............................................................................................ 94

5.2.3

Clock Frequency in Sleep (Medium-Speed) Mode .............................................. 95

5.3

Standby Mode ................................................................................................................... 95

HD6433644R Datasheet(PDF) 12 Page - Renesas Technology Corp

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