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SH7785 Datasheet(PDF) 164 Page - Renesas Technology Corp |
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SH7785 Datasheet(HTML) 164 Page - Renesas Technology Corp |
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164 / 1692 page  6. Floating-Point Unit (FPU) Rev.1.00 Jan. 10, 2008 Page 134 of 1658 REJ09B0261-0100 Bit Bit Name Initial Value R/W Description 17 to 12 Cause All 0 R/W 11 to 7 Enable All 0 R/W 6 to 2 Flag All 0 R/W FPU Exception Cause Field FPU Exception Enable Field FPU Exception Flag Field Each time an FPU operation instruction is executed, the FPU exception cause field is cleared to 0. When an FPU exception occurs, the bits corresponding to FPU exception cause field and flag field are set to 1. The FPU exception flag field remains set to 1 until it is cleared to 0 by software. For bit allocations of each field, see table 6.3. 1 0 RM1 RM0 0 1 R/W R/W Rounding Mode These bits select the rounding mode. 00: Round to Nearest 01: Round to Zero 10: Reserved 11: Reserved |
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