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32186 Datasheet(PDF) 467 Page - Renesas Technology Corp |
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32186 Datasheet(HTML) 467 Page - Renesas Technology Corp |
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467 / 1032 page ![]() 10.8 TOU (Output-Related 24-Bit Timer) MULTIJUNCTION TIMERS 10 10-171 32185/32186 Group Hardware Manual Rev.1.10 REJ09B0235-0110 May 15, 07 10.8.12 PWM Output Disable Level Control Registers PWM Output 0 Disable Level Control Register GA (PO0LVGACR) <Address: H'0080 0521> <Upon exiting reset: H’00> b Bit Name Function R W 8–13 No function assigned. Fix to "0." 00 14 PO0LVSELGA 0: Select "L" output disable level R W P87/TO21–P82/TO26 output disable level select bit 1: Select "H" output disable level 15 PO0LVENGA 0: Disable selected output disable level R W Output disable level enable/disable select bit 1: Enable selected output disable level PWM Output 1 Disable Level Control Register GA (PO1LVGACR) <Address: H'0080 0523> <Upon exiting reset: H’00> b Bit Name Function R W 8–13 No function assigned. Fix to "0." 00 14 PO1LVSELGA 0: Select "L" output disable level R W P110/TO29–P115/TO34 output disable level select bit 1: Select "H" output disable level 15 PO1LVENGA 0: Disable selected output disable level R W Output disable level enable/disable select bit 1: Enable selected output disable level PWM Output 0 Disable Level Control Register GB (PO0LVGBCR) <Address: H'0080 0781> <Upon exiting reset: H’00> b Bit Name Function R W 8–13 No function assigned. Fix to "0." 00 14 PO0LVSELGB 0: Select "L" output disable level R W P00/TO21–P05/TO26 output disable level select bit 1: Select "H" output disable level 15 PO0LVENGB 0: Disable selected output disable level R W Output disable level enable/disable select bit 1: Enable selected output disable level PWM Output 1 Disable Level Control Register GB (PO1LVGBCR) <Address: H'0080 0783> <Upon exiting reset: H’00> b Bit Name Function R W 8–13 No function assigned. Fix to "0." 00 14 PO1LVSELGB 0: Select "L" output disable level R W P10/TO29–P15/TO34 output disable level select bit 1: Select "H" output disable level 15 PO1LVENGB 0: Disable selected output disable level R W Output disable level enable/disable select bit 1: Enable selected output disable level b8 9 10 11121314 b15 PO0LVSELGA PO0LVENGA 000 0000 0 b8 9 10 11121314 b15 PO0LVSELGB PO0LVENGB 000 00000 b8 9 10 11121314 b15 PO1LVSELGB PO1LVENGB 000 00000 b8 9 10 11121314 b15 PO1LVSELGA PO1LVENGA 000 0000 0 |
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