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SH7021 Datasheet(PDF) 295 Page - Renesas Technology Corp |
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SH7021 Datasheet(HTML) 295 Page - Renesas Technology Corp |
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295 / 509 page  RENESAS 279 CK TIOC pin Input capture signal TCNT BR GR n n + 1 N N + 1 M m nn N MM n Figure 10.51 Input Capture Timing Example for Buffer Operation An example of buffer operation in the complementary PWM mode between GRB3 and BRB3 is as shown in figure 10.52. By making GRB3 larger than GRA3 using the buffer operation, a PWM waveform with a duty cycle of 0% is generated. The transfer from BRB–GRB occurs upon TCNT3 and GRA compare match and TCNT4 underflow. TCNT3 and TCNT4 values H' 1FFF GRA3 H' 0999 H' 0000 BRB3 GRB3 TIOCA3 TIOCB3 H' 1FFF H' 1FFF Time H' 0999 H' 0999 H' 1FFF H' 0999 TCNT3 TCNT4 GRB3 H' 0999 H' 0999 Figure 10.52 Buffer Operation 4 (Complementary PWM Mode) |
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