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4501 Datasheet(PDF) 137 Page - Renesas Technology Corp |
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4501 Datasheet(HTML) 137 Page - Renesas Technology Corp |
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137 / 212 page ![]() 2.2 Interrupts 2-20 Rev.2.01 Feb 07, 2005 4501 Group APPLICATION REJ09B0192-0201 2.2.4 Notes on use (1) Setting of INT interrupt valid waveform Set a value to the bit 2 of register I1, and execute the SNZ0 instruction to clear the EXF0 flag to “0” after executing at least one instruction. Depending on the input state of P13/INT pin, the external interrupt request flag (EXF0) may be set to “1” when the interrupt valid waveform is changed. (2) Setting of INT pin input control Set a value to the bit 3 of register I1, and execute the SNZ0 instruction to clear the EXF0 flag to “0” after executing at least one instruction. Depending on the input state of P13/INT pin, the external interrupt request flag (EXF0) may be set to “1” when the interrupt valid waveform is changed. (3) Multiple interrupts Multiple interrupts cannot be used in the 4501 Group. (4) Notes on interrupt processing When the interrupt occurs, at the same time, the interrupt enable flag INTE is cleared to “0” (interrupt disable state). In order to enable the interrupt at the same time when system returns from the interrupt, write EI and RTI instructions continuously. (5) P13/INT pin The P13/INT pin need not be selected the external interrupt input INT function or the normal output port P13 function. However, the EXF0 flag is set to “1” when a valid waveform is input to INT pin even if it is used as an I/O port P13. (6) Power down instruction Be sure to disable interrupts by executing the DI instruction before executing the EPOF instruction. |
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