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7477 Datasheet(PDF) 56 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  361 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 56 Page - Renesas Technology Corp

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7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.11 Interrupts
1-49
(1) INT interrupt
When detecting a rising edge or a falling edge of each INT pin (INT0, INT1), the microcomputer
generates an INT interrupt request.These polarity is selected by the edge polarity selection register
(EG: Address 00D416).
2
2
2
2
2 P30, P31 pins
The INT0 and INT1 pins are used in common with the P30 and P31 pins and always detect the
levels of P30 and P31.
2
2
2
2
2 In the stop mode/wait mode
When bit 5 of the Edge polarity selection register is “0,” a restoration can be attained by the INT
interrupt from the stop mode/wait mode state provided by the STP/WIT instruction. For the details,
refer to “1.17 Low-power dissipation function.”
2
2
2
2
2 After reset
At reset release, the Edge polarity selection register is cleared to “0016,” so the INT0 and INT1
interrupts generate the interrupt request by detecting a falling edge. At reset release, however, the
Interrupt control register is put into the interrupt disable state, so any interrupt is not accepted.
Note: The INT0 and INT1 pins are used in common with input port P30 and P31, however, there is
no register for switching between the INT pins and the ports, so the active edges of P30 and
P31 are always detected. When these pins are used as ports, put the corresponding INT
interrupt into the disable state.
In the INT interrupt enable state, the INT interrupt is generated by a pin level change, thereby
causing a program run away.
(2) Key-on wake up interrupt
When bit 5 of the Edge polarity selection register is “1,” the key-on wake up interrupt request is
generated by applying the “L” level to any pin of P0 being an input port in the stop mode/wait mode
provided by the STP/WIT instruction, so that a recovery can be attained from the stop mode/wait
mode.
2
2
2
2
2 After reset
At reset release, bit 5 of the Edge polarity selection register is cleared to “0” so that the key-on
wake up interrupt request does not occur in the stop mode/wait mode.
Notes 1: In modes other than the stop mode/wait mode, the key-on wake up interrupt is disabled.
2: To select the stop mode/wait mode by the STP/WIT instruction when the interrupt disable
flag is cleared to “0” and bit 5 of the Edge polarity selection register is set to “1,” set every
input to P0 to “H.”



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