EM6819 datasheet(42/154 Pages) EMMICRO

42 / 154 page

EM6819

07 /09 – rev.D

www.emmicroelectronic.com

6.2 SUB-ROUTINES USED FOR APPLICATION

Using sub-routine in ROM API has an impact on the execution time and the memory. The following table shows for each

application routine the number of CPU instructions needed to execute the sub-routine and the addresses in RAM

memory used by the sub-routine “software stack” that cannot be recovered.

ROM API sub-routine does not use any fixed RAM address for parameter storage. All local variables needed by any of

the application sub-routine are stored on the software stack, thus the application programmer shall ensure that:

The software stack pointer points to the RAM before any call of the application routine. The software stack

pointer is i3 register of CR816. The i3 stack pointer is not initialised by the ROM SW boot sequence. It is under

the programmer responsibility to initialise it after boot sequence.

The application does not use the the memory in range i3 points too. Depending on the sub-routine, this range

can be from i3-21 to i3. All data stored in this range before calling the sub-routine may be lost. It is advised to

reserve 22 bytes for software stack in RAM to ensure that any sub-routine will never erase important data.

Routine name

Stack requirements

(bytes)

Execution time

cacl_crc_code_apl

12 bytes

11.2N + 66 (-3% ; +7%) instructions

N = stop_address – start_address + 1

cacl_crc_data_apl

10 bytes

6N + 64 (-4% ; +3%) instructions

N = stop_address – start_address + 1

erase_row_apl

22 bytes

2 ms (no fixed number of instruction)

erase_row_slow_apl

22 bytes

3 ms (no fixed number of instruction)

erase_sector_apl

22 bytes

2 ms (no fixed number of instruction)

erase_sector_slow_apl

22 bytes

3 ms (no fixed number of instruction)

nvm_to_cache

14 bytes

351 instructions

write_only_apl

22 bytes

1 ms (no fixed number of instruction)

write_only_slow_apl

22 bytes

1.5 ms (no fixed number of instruction)

write_row_apl

22 bytes

3 ms (no fixed number of instruction)

write_row_slow_apl

22 bytes

4.5 ms (no fixed number of instruction)

get_def

Copy’s row 63 in RAM cache

get_trim

Copy’s row 62 in RAM cache

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