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EM6819 Datasheet(PDF) 55 Page - EM Microelectronic - MARIN SA

Part # EM6819
Description  Sub-1V (0.6V) 8bit Flash MCU DC-DC Converter
PDF  154 Pages
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Manufacturer  EMMICRO [EM Microelectronic - MARIN SA]
Direct Link  http://www.emmicroelectronic.com
Logo EMMICRO - EM Microelectronic - MARIN SA

EM6819 Datasheet(HTML) 55 Page - EM Microelectronic - MARIN SA

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EM6819
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© 2009, EM Microelectronic-Marin SA
07 /09 – rev.D
55
www.emmicroelectronic.com
10.
PRESCALER1
The prescaler1 is a 15 stage clock divider. It is typically used to deliver the input clocks to the digital peripherals (timers,
SPI, etc..). Its last stage output is on 1Hz (at 32768Hz input clock) and therefore most often used to construct a RTC
(Real Time Clock) system.
It can also be used as a free running counter by reading the current status of Pr1Ck0(MSB) to Pr1Ck7(LSB) in register
RegPresc1Val.
10.1 PRESCALER1 CLOCK SELECTION
The Prescaler1 input clock Ck_Pr1 is derived from divided or undivided Ck_Hi or Ck_Lo input clock. Below table is an
overview of the different prescaler1 clocking possibilities. The prescaler clock divider selection is done in register
RegClockCfg3 bits SelCkPr1.
SelCkPr1
Prescaler1 Clock
000
Ck_Hi (divided by 1)
001
Ck_Hi divided by 2
010
Ck_Hi divided by 4
011
Ck_Hi divided by 8 (default)
100
Ck_Lo (divided by 1)
Others
Ck_Hi divided by 8
The default Prescaler1 clock source after system reset (ResSys) shall be Ck_Hi divided by 8 (selection 0x3).
It is possible to run the 15 stage precaler1 on 13 stages only. This is typically used when connecting the RC_8K
oscillator as the prescaler1 clock source and allow to keep the nominal prescaler output frequencies as if there would be
an 32kHz Xtal oscillator connected (prescaler at 15 stages). The prescaler1 length selection is done in register
RegPrescCfg bit Presc1Len (‘0’= 15 stages, ‘1’=13 stages).
The Signals Pr1Ck14 and Pr1Ck13 are thus not influenced by the shortening.
Assuming a Prescaler1 with N stages, then the signal Pr1Ck[N] is the input of the first stage, Pr1Ck[N-1] is the output of
the first stage (input divided by 2) and Pr1Ck0 is the output of the last stage (the lowest frequency). This leads to
following clock source name definitions.
Presc1Len = ‘0’
Presc1Len = ‘1’
Prescaler1
stage
Clock Name
Division by
Fout
Division by
Fout
Prescaler source:
Pr1Ck15
1
2^0
32K
1
2^0
8K
Stage 1
Pr1Ck14
2
2^1
16K
2
2^1
4K
Stage 2
Pr1Ck13
4
2^2
8K
4
2^2
2K
Stage 3
Pr1Ck12
8
2^3
4K
2
2^1
4K
Stage 4
Pr1Ck11
16
2^4
2K
4
2^2
2K
Stage 5
Pr1Ck10
32
2^5
1K
8
2^3
1K
Stage 6
Pr1Ck9
64
2^6
512
16
2^4
512
Stage 7
Pr1Ck8
128
2^7
256
32
2^5
256
Stage 8
Pr1Ck7
256
2^8
128
64
2^6
128
Stage 9
Pr1Ck6
512
2^9
64
128
2^7
64
Stage 10
Pr1Ck5
1K
2^10
32
256
2^8
32
Stage 11
Pr1Ck4
2K
2^11
16
512
2^9
16
Stage 12
Pr1Ck3
4K
2^12
8
1K
2^10
8
Stage 13
Pr1Ck2
8K
2^13
4
2K
2^11
4
Stage 14
Pr1Ck1
16K
2^14
2
4K
2^12
2
Stage 15
Pr1Ck0
32K
2^15
1
8K
2^13
1
The frequencies Fout given in this table are based on 32 KHz clock selection as a prescaler1 input source.



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