EM6819 datasheet(44/154 Pages) EMMICRO

44 / 154 page

EM6819

07 /09 – rev.D

www.emmicroelectronic.com

RESET CONTROLLER

The reset controller collects all different reset sources and initializes the needed peripheral registers. Refer to the

individual peripheral register mapping tables to see which reset is initializing a specific register.

Some of the reset sources are maskable to prevent undesired system reinitialization.

After any reset the circuit will perform a power check and go to active mode. Then the reset status bits can be read to

identify the reset source.

8.1 RESET SOURCES

Possible reset source signals are:

POR

Power on reset, non-maskable

The fully internal POR cell will initialize the full circuit at power-up or if the supply voltge falls below

VPOR voltage.

PwrDown

Power-Down mode

In power down all internal registers are initialized, the pad configuration however may be locked to the

last good state by setting LckPwrCfg=1 prior to Power-Down mode.

ResPA

User defined Port A terminal reset function, maskable.

Any port A terminal may trigger reset.

ResWD

Watchdog timer reaching 0, maskable.

Logic watchdog reset running on the internal 8kHz Oscillator.

ResBO

Brown out reset at low regulated voltage, maskable.

ResBE

CoolRISC bus error when trying to access non-valid instruction space, non-maskable.

ResGASP

Entering Gasp modes (ISP, DoC), non-maskable.

This reset initializes the circuit prior to programming or degugging.

8.2 RESET SIGNALS

A combination of the above mentioned reset sources is used to initialize the different peripheral registers. These reset

signals are POR, PorLog, ResAna, ResSys.

8.2.1

POR

A small logic remains active even in Power-Down mode to allow wake-up. This logic is initialized by POR signal. In the

user data memory space this concerns the bit LckPwrCfg.

8.2.2

PORLOG

PorLog signal will reinitialize all reset flags and all pullup/pulldown configuration bits

PorLog = Por OR PwrDown (logical OR combination)

8.2.3

RESANA

ResAna signal will initialize all reset enable bits, the port A input and output enable bits, the port A debouncer selection

bits, all trim bits and the analog configuration settings for the DC-DC and Opamp.

ResAna = Por OR PwrDown OR ResWD OR ResBE (logical OR combination)

8.2.4

RESSYS

ResSys signal initializes all remaining data memory registers, except the RAM which needs to be initialized by the user

software if needed.

ResSys = Por OR PwrDown OR ResWD OR ResBE OR ResPA OR ResGasp OR ResBO

EM6819 Datasheet(PDF) 44 Page - EM Microelectronic - MARIN SA

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