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EM6819 Datasheet(PDF) 45 Page - EM Microelectronic - MARIN SA |
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EM6819 Datasheet(HTML) 45 Page - EM Microelectronic - MARIN SA |
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45 / 154 page ![]() R EM6819 Copyright © 2009, EM Microelectronic-Marin SA 07 /09 – rev.D 45 www.emmicroelectronic.com 8.2.5 RESET FLAGS All reset flags are in the Reset flag register: RegResFlg and placed as follows The ResFlgPA bit is asserted by reset from PortA. The ResFlgWD bit is asserted by reset from Watchdog. The ResFlgBO bit is asserted by reset from Brownout. The ResFlgGasp bit is asserted by reset from GASP. The ResFlgBE bit is asserted by reset from CoolRisc Bus-error detection. Note: To detect the Reset from Power-Down, the SW shall read the status of LckPwrCfg. 8.3 RESET REGISTERS 0x0000 RegSysCfg1 System Configuration - 1 Bits Name Type ResVal ResSrc Description 7 SelSleep RW 0 ResSys Select Sleep mode on Halt 6 SelPwrDwn RW 0 ResSys Select Power-Down mode on Halt 4 EnBrownOut RW 1 ResAna Enable Brown Out 3:2 XtalCldStart RW '00' ResSys Select Xtal Osc. ColdStart length 1 StdByFastWkUp RW 0 ResSys Stand-by mode fast Wakeup 0 VSUPLow RO 0 VSUP is Low - Tripler activated 0x0001 RegEnResPA Enable Reset by PortA bits Bits Name Type ResVal ResSrc Description 7:0 EnResPA RW 0x00 ResAna Enable Reset by PortA bits 0x0006 RegResFlg Reset Flags Bits Name Type ResVal ResSrc Description 7 ResFlgPA ResFlg 0 PorLog Flag Reset from Port-A 6 ResFlgWD ResFlg 0 PorLog Flag Reset from WatchDog 5 ResFlgBO ResFlg 0 PorLog Flag Reset from Brown-Out 4 ResFlgGasp ResFlg 0 PorLog Flag Reset from GASP 3 ResFlgBE ResFlg 0 PorLog Flag Reset from CoolRISC Bus-Error 0 LckPwrCfg RW 0 Por Lock configurations to be kept in Power-Down mode |
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