ATtiny48 datasheet(87/266 Pages) ATMEL

87 / 266 page

8008C–AVR–03/09

ATtiny48/88

It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt

occurs between the two instructions accessing the 16-bit register, and the interrupt code

updates the temporary register by accessing the same or any other of the 16-bit Timer Regis-

ters, then the result of the access outside the interrupt will be corrupted. Therefore, when both

the main code and the interrupt code update the temporary register, the main code must disable

the interrupts during the 16-bit access.

The following code examples show how to do an atomic read of the TCNT1 Register contents.

Reading any of the OCR1A/B or ICR1 Registers can be done by using the same principle.

Note:

1. See ”About Code Examples” on page 7.

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”

instructions must be replaced with instructions that allow access to extended I/O. Typically

“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

The assembly code example returns the TCNT1 value in the r17:r16 register pair.

Assembly Code Example

(1)

TIM16_ReadTCNT

; Save global interrupt flag

r18,SREG

; Disable interrupts

cli

; Read TCNT

1 into r17:r16

r16,TCNT

r17,TCNT

; Restore global interrupt flag

out

SREG,r18

ret

C Code Example

(1)

unsigned int

TIM16_ReadTCNT

1( void )

{

unsigned char

sreg;

unsigned int

/* Save global interrupt flag */

sreg = SREG;

/* Disable interrupts */

_CLI();

/* Read TCNT

1 into i */

i = TCNT

/* Restore global interrupt flag */

SREG = sreg;

return

}

ATtiny48 Datasheet(PDF) 87 Page - ATMEL Corporation

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