ATtiny48 datasheet(36/266 Pages) ATMEL

36 / 266 page

8008C–AVR–03/09

ATtiny48/88

7.3.6

Port Pins

When entering a sleep mode, all port pins should be configured to use minimum power. The

most important is then to ensure that no pins drive resistive loads. In sleep modes where both

the I/O clock (clk

I/O) and the ADC clock (clkADC) are stopped, the input buffers of the device will

be disabled. This ensures that no power is consumed by the input logic when not needed. In

some cases, the input logic is needed for detecting wake-up conditions, and it will then be

enabled. Refer to the section “Digital Input Enable and Sleep Modes” on page 60 for details on

which pins are enabled. If the input buffer is enabled and the input signal is left floating or have

an analog signal level close to V

CC/2, the input buffer will use excessive power.

For analog input pins, the digital input buffer should be disabled at all times. An analog signal

level close to V

CC/2 on an input pin can cause significant current even in active mode. Digital

input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and

DIDR0). Refer to “DIDR1 – Digital Input Disable Register 1” on page 157 and “DIDR0 – Digital

Input Disable Register 0” on page 174 for details.

7.3.7

On-chip Debug System

If the On-chip debug system is enabled by the DWEN Fuse and the chip enters sleep mode, the

main clock source is enabled and hence always consumes power. In the deeper sleep modes,

this will contribute significantly to the total current consumption.

7.4

7.4.1

SMCR – Sleep Mode Control Register

The Sleep Mode Control Register contains control bits for power management.

• Bits 7..3 – Res: Reserved Bits

These bits are reserved and will always read zero.

• Bits 2..1 – SM1..0: Sleep Mode Select Bits 1 and 0

These bits select between the available sleep modes as shown in Table 7-2.

• Bit 0 – SE: Sleep Enable

The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP

instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s

purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of

the SLEEP instruction and to clear it immediately after waking up.

Bit

654

–

SM1

SM0

SMCR

Read/Write

R/W

Initial Value

Table 7-2.

Sleep Mode Select

SM1

SM0

Sleep Mode

Idle

ADC Noise Reduction

Power-down

Reserved

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