ATtiny48 datasheet(16/266 Pages) ATMEL

16 / 266 page

8008C–AVR–03/09

ATtiny48/88

Memories

This section describes the different memories in the ATtiny48/88. The AVR architecture has two

main memory spaces, the Data Memory and the Program Memory space. In addition, the

ATtiny48/88 features an EEPROM Memory for data storage. All three memory spaces are linear

and regular.

5.1

In-System Reprogrammable Flash Program Memory

The ATtiny48/88 contains 4/8K bytes On-chip In-System Reprogrammable Flash memory for

program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as

2/4K x 16. ATtiny48/88 does not have separate Boot Loader and Application Program sections,

and the SPM instruction can be executed from the entire Flash. See SELFPRGEN description in

section “SPMCSR – Store Program Memory Control and Status Register” on page 182 for more

details.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny48/88

Program Counter (PC) is 11/12 bits wide, thus addressing the 2/4K program memory locations.

“Memory Programming” on page 184 contains a detailed description on Flash Programming in

SPI- or Parallel Programming mode.

Constant tables can be allocated within the entire program memory address space (see instruc-

tions LPM – Load Program Memory and SPM – Store Program Memory).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 13.

Figure 5-1.

Program Memory Map of ATtiny48/88

0x0000

0x07FF/0x0FFF

Program Memory

Application Flash Section

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