ATtiny48 datasheet(27/266 Pages) ATMEL

27 / 266 page

8008C–AVR–03/09

ATtiny48/88

and temperature dependent, as shown in “Watchdog Oscillator Frequency vs. VCC” on page

236 and “Watchdog Oscillator Frequency vs. Temperature” on page 237.

The main purpose of the delay is to keep the AVR in reset until it is supplied with minimum V

CC.

The delay will not monitor the actual voltage and it will be required to select a delay longer than

the V

CC rise time. If this is not possible, an internal or external Brown-Out Detection circuit

should be used. A BOD circuit will ensure sufficient V

CC before it releases the reset, and the

time-out delay can be disabled. Disabling the time-out delay without utilizing a Brown-Out Detec-

tion circuit is not recommended.

The oscillator is required to oscillate for a minimum number of cycles before the clock is consid-

ered stable. An internal ripple counter monitors the oscillator output clock, and keeps the internal

reset active for a given number of clock cycles. The reset is then released and the device will

start to execute.

The start-up sequence for the clock includes both the time-out delay and the start-up time when

the device starts up from reset. When starting up from Power-down mode, V

CC is assumed to be

at a sufficient level and only the start-up time is included.

6.3

Calibrated Internal Oscillator

By default, the Internal Oscillator provides an approximate 8.0 MHz clock. Though voltage and

temperature dependent, this clock can be very accurately calibrated by the user. See Table 21-1

on page 203 for more details. The device is shipped with the CKDIV8 Fuse programmed. See

“System Clock Prescaler” on page 30 for more details.

This clock may be selected as the system clock by programming the CKSEL Fuses as shown in

Table 6-3. If selected, it will operate with no external components. During reset, hardware loads

the pre-programmed calibration value into the OSCCAL Register and thereby automatically cal-

ibrates the oscillator. The accuracy of this calibration is shown as Factory calibration in Table 21-

1 on page 203.

By changing the OSCCAL register from SW, see “OSCCAL – Oscillator Calibration Register” on

page 31, it is possible to get a higher calibration accuracy than by using the factory calibration.

The accuracy of this calibration is shown as User calibration in Table 21-1 on page 203.

Table 6-2.

Length of Startup Sequence.

CKSEL1:0

SUT1:0

Number of WDT Cycles

Typical Time-out

0 ms

4K (4,096)

4 ms

8K (8,192)

64 ms

Reserved

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