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MAC7200 Datasheet(PDF) 376 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 376 Page - Freescale Semiconductor, Inc |
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376 / 976 page ![]() Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 298 Freescale Semiconductor time for less-critical task handling. The assertion of an interrupt request via the INTFRC register is not affected by the Interrupt Mask Register. The INTFRC register is cleared by reset. See Figure 14-4 and Table 14-9 for the INTFRC definition. Register address: INTC_Offset + 0x10 (INTFRCH), + 0x14 (INTFRCL) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R W RESET: 0000000000000000 15 14 13 12 11 10 9876543210 R W RESET: 0000000000000000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R W RESET: 0000000000000000 15 14 13 12 11 10 9876543210 R W RESET: 0000000000000000 = Unimplemented or Reserved Figure 14-4. Force Interrupt (INTFRCH, INTFRCL) Registers Table 14-9. Force Interrupt (INTFRCH, INTFRCL) Field Descriptions Name Description Value IFRCn, n = 0,... 63 Interrupt Force Register n 0 The forced interrupt request n is disabled. 1 A forced interrupt request n is enabled. |
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