MAC7200 datasheet(379/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

301

14.8.1.6

Clear Interrupt Mask (CIMR) Register

The CIMR register provides a simple memory-mapped mechanism to clear a given bit in the IMR{H,L}

registers to enable a given interrupt request. The data value on a register write causes the corresponding

bit in the IMR{H,L} register to be cleared. A data value greater than 63 provides a global clear function,

forcing the entire contents of IMR{H,L} to be cleared, enabling all interrupts. Reads of this register return

all zeroes.

This register is provided so interrupt service routines can easily enable the given interrupt request without

the need to perform a read-modify-write sequence on the IMR{H,L}.

In the event of a simultaneous write to both the CIMR and SIMR, the SIMR has priority and the resulting

function would be a set of the interrupt mask register.

See Figure 14-7 and Figure 14-12 for the CIMR definition.

76543210

00000000

SIMR[6:0]

RESET:

0000000

= Unimplemented or Reserved

Figure 14-6. Set Interrupt Mask (SIMR) Register

Table 14-11. Set Interrupt Mask (SIMR) Field Descriptions

Name

Description

6–0

SIMR

Set Interrupt Mask

0-63

Set the corresponding bit in IMR{H,L},

masking the interrupt request

64-127 Set all bits in IMR{H,L}, masking all

interrupt requests

76543210

00000000

CIMR[6:0]

RESET:

0000000

= Unimplemented or Reserved

Figure 14-7. Clear Interrupt Mask (CIMR) Register

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