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MAC7200 Datasheet(PDF) 373 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 373 Page - Freescale Semiconductor, Inc |
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373 / 976 page  Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 295 the Interrupt Mask Register does not affect the IPR. The IPR is cleared by reset and updated each platform clock cycle. The IPR is a read-only register, so any attempted write to this register is terminated with an error. Each bit of the IPR[n] is mapped to the corresponding input signal ipi_int[n], i.e., IPR[63:0] is mapped to ipi_int[63:0]. See Figure 14-2 and Table 14-7 for the IPR definition. Register address: INTC_Offset + 0x00 (IPRH), + 0x04 (IPRL) 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R W — — — — — — — — — — — — — — — — RESET: 0000000000000000 15 14 13 12 11 10 9876543210 R W — — — — — — — — — — — — — — — — RESET: 0000000000000000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R W — — — — — — — — — — — — — — — — RESET: 0000000000000000 15 14 13 12 11 10 9876543210 R W — — — — — — — — — — — — — — — — RESET: 0000000000000000 = Unimplemented or Reserved Figure 14-2. Interrupt Pending (IPRH, IPRL) Registers |
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