MAC7200 datasheet(424/976 Pages) FREESCALE

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Chip-Select Operation

MAC7200 Microcontroller Family Reference Manual, Rev. 2

346

Freescale Semiconductor

Table 17-6 describes CSMR fields.

BAM

Reset

000

0000

000

Reg

Addr

MBAR + 0x04 (CSMR0); 0x10 (CSMR1); 0x1C (CSMR2)

9876

543

210

000

Reset

000

0000

000

Reg

Addr

MBAR + 0x04 (CSMR0); 0x10 (CSMR1); 0x1C (CSMR2)

Figure 17-3. Chip-Select Mask Registers (CSMRn)

Table 17-6. CSMRn Field Descriptions

Bits

Name

Description

31–16

BAM

Base address mask. Defines the chip-select block size by masking address bits. Setting a

BAM bit causes the corresponding CSAR bit to be a “don’t care” in the decode.

0 Corresponding address bit is used in chip-select decode.

1 Corresponding address bit is a don’t care in chip-select decode.

The block size for CSn is 2n; n = (number of bits set in respective CSMR[BAM]) + 16.

For example, if CSAR0 = 0x0000 and CSMR0[BAM] = 0x0008, CS0 would address two

discontinuous 64-Kbyte memory blocks: one from 0x0000–0xFFFF and one from

0x8_0000–0x8_FFFF.

In another example, CS0 is setup to access 32 Mbytes of address space starting at

location 0x0 and CS1 is setup to access 16 Mbytes at the next byte after CS0. Then

CSAR0 = 0x0000, CSMR0[BAM] = 0x01FF, CSAR1 = 0x0200, and CSMR1[BAM] =

0x00FF.However, the size of the window may also physically be constrained by the size of

the data port, which constrains the number of address lines available in some modes.

15–9

—

Reserved, should be cleared

Write protect. Controls write accesses to the address range in the corresponding CSAR.

Attempting to write to the range of addresses for which CSARn[WP] = 1 results in the

appropriate chip-select not being selected and . No exception occurs.

0 Both read and write accesses are allowed

1 Only read accesses are allowed

7–1

—

Reserved, should be cleared

Valid bit. Indicates whether the corresponding CSAR, CSMR, and CSCR contents are

valid. Programmed chip-selects do not assert until V bit is set (except for CS0, which acts

as the global chip-select). Reset clears each CSMRn[V]. At reset, no chip-select other than

CS0 can be used until the CSMR0[V] is set. At which point CS[2:0] functions as configured.

0 chip-select invalid

1 chip-select valid

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