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MAC7200 Datasheet(PDF) 439 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 439 Page - Freescale Semiconductor, Inc |
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439 / 976 page ![]() Flash External Pins MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 361 •LAS = 0 •MAS = 1 18.4 Flash External Pins There are no Flash or Flash Controller signals that drive or are driven from MCU pins. 18.5 PFLASH Bus Aborts 18.5.1 IPI Register Interface The H7Fb module does not support Peripheral Bus bus aborts, but this capability is implemented outside of the H7Fb block, to give the following: Supervisor Access: Unused. 18.5.2 Flash Array Interface In addition to Peripheral Bus bus aborts, the flash can also abort array interface (AHB for the MAC72xx) accesses, for a variety of reasons: • Access generated an ECC error • Access generated a Read-while-Write violation (e.g.-trying to read the same partition that is being programmed or erased) • Aborting a program/erase high voltage operation 18.6 PFLASH Differences MAC72x2 from MAC71xx • All accesses are through a single bus interface, residing on AXBS Slave Port 0 • Removed Peripheral Bus read/write interface • Added ECC (1-bit correction, 2-bit detection) • Completely different programming interface for the Flash • Removed Configuration Field. Configuration data is now stored at the upper addresses of the Shadow Block. • Program/Erase partitioning changed — Flash Main Array (Old): 15x4K + 2x196K + 15x4K — Flash Main Array (New - MAC72x2): 2x128K + 4x16K — Shadow Block (Old): 2x2K + 1x4K + 2x8K + 1x4K + 2x2K Table 18-1. PFLASH Bus Aborts Abort Allowed $0000-$002f $0030-$3fff |
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