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MAC7200 Datasheet(PDF) 670 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 670 Page - Freescale Semiconductor, Inc |
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670 / 976 page ![]() Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 592 Freescale Semiconductor 30.11.2.4 DSPI Status Register (DSPI_SR) The DSPI_SR contains status and flag bits. The bits reflect the status of the DSPI and indicate the occurrence of events that can generate interrupt or DMA requests. Software can clear flag bits in the DSPI_SR by writing a ‘1’ to it. Writing a ‘0’ to a flag bit has no effect. Table 30-15. DSPI Delay after Transfer Scaler DT Delay after Transfer Scaler Value DT Delay after Transfer Scaler Value 0000 2 1000 512 0001 4 1001 1024 0010 8 1010 2048 0011 16 1011 4096 0100 32 1100 8192 0101 64 1101 16384 0110 128 1110 32768 0111 256 1111 65536 Table 30-16. DSPI Baud Rate Scaler BR Baud Rate Scaler Value BR Baud Rate Scaler Value 0000 2 1000 256 0001 4 1001 512 0010 6 1010 1024 0011 8 1011 2048 0100 16 1100 4096 0101 32 1101 8192 0110 64 1110 16384 0111 128 1111 32768 |
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