MAC7200 datasheet(729/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

651

When the eSCI is configured for 9-bit data characters, the ninth data bit is the T8 bit in SCI data register

high (SCIDRH). It remains unchanged after transmission and can be used repeatedly without rewriting it.

A frame with nine data bits has a total of 11 bits.

31.10.3 Baud Rate Generation

A 13-bit modulus counter in the baud rate generator derives the baud rate for both the receiver and the

transmitter. The value from 0 to 8191 written to the SBR12–SBR0 bits determines the module clock

divisor. The SBR bits are in the SCI baud rate registers (SCIBDH and SCIBDL). The baud rate clock is

synchronized with the bus clock and drives the receiver. The baud rate clock divided by 16 drives the

transmitter. The receiver has an acquisition rate of 16 samples per bit time.

Baud rate generation is subject to one source of error:

•

Integer division of the module clock may not give the exact target frequency.

Figure 31-23 lists some examples of achieving target baud rates with a module clock frequency of

10.2 MHz.

Eqn. 31-3

Table 31-21. Example of 8-bit Data Formats

Start

Bit

Data

Bits

Address

Bits

Parity

Bits

Stop

Bit

8001

7011

1. The address bit identifies the frame as an address

character. See Section 31.10.5.6, “Receiver Wakeup.”

Table 31-22. Example of 9-Bit Data Formats

Start

Bit

Data

Bits

Address

Bits

Parity

Bits

Stop

Bit

9001

8011

1. The address bit identifies the frame as an address

character. See Section 31.10.5.6, “Receiver Wakeup.”

Table 31-23. Baud Rates (Example: Module Clock = 10.2 Mhz)

Bits

SBR[12-0]

Receiver

Clock (Hz)

Transmitter

Clock (Hz)

Target Baud

Rate

Error

(%)

600,000.0

37,500.0

38,400

2.3

309,090.9

19,318.2

19,200

.62

SCI baud rate

SCI module clock

SCIBR 12:0

[]

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