MAC7200 datasheet(731/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

653

31.10.4.1 Transmitter Character Length

The eSCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI

control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8

in SCI data register high (SCIDRH) is the ninth bit (bit 8).

31.10.4.2 Character Transmission

To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn

are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through

the Tx output signal, after it has prefaced them with a start bit and appended them with a stop bit. The SCI

data registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the

transmit shift register.

The eSCI also sets a flag, the transmit data register empty flag (TDRE), every time it transfers data from

the buffer (SCIDRH/L) to the transmitter shift register.The transmit driver routine may respond to this flag

by writing another byte to the Transmitter buffer (SCIDRH/SCIDRL), while the shift register is still

shifting out the first byte.

To initiate an SCI transmission:

12. Configure the eSCI:

a) Turn on the module by writing the MDIS bit to 0.

b) Select a baud rate. Write this value to the SCI baud registers (SCIBDH/L) to start the baud rate

generator. Remember that the baud rate generator is disabled when the baud rate is zero.

Writing to the SCIBDH has no effect without also writing to SCIBDL.

c) Write to SCICR1 to configure word length, parity, and other configuration bits (LOOPS,

RSRC, M, WAKE, ILT, PE, PT).

d) Enable the transmitter, interrupts, receive, and wake up as required, by writing to the SCICR2

now be shifted out of the transmitter shift register.

13. Transmit Procedure for Each Byte:

a) Poll the TDRE flag by reading the SCISR1 or responding to the TDRE interrupt. Keep in mind

that the TDRE bit resets to one.

b) If the TDRE flag is set, write the data to be transmitted to SCIDRH/L, where the ninth bit is

written to the T8 bit in SCIDRH if the eSCI is in 9-bit data format.

14. Repeat step 2 for each subsequent transmission.

NOTE

The TDRE flag is set when the shift register is loaded with the next data to

be transmitted from SCIDRH/L, which happens, generally speaking, a little

over half-way through the stop bit of the previous frame. Specifically, this

transfer occurs 9/16ths of a bit time AFTER the start of the stop bit of the

previous frame.

Writing the TE bit from 0 to a 1 automatically loads the transmit shift register with a preamble of 10 logic

1s (if M = 0) or 11 logic 1s (if M = 1). After the preamble shifts out, control logic transfers the data from

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