MAC7200 datasheet(749/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

671

31.10.9.20 OVFL Description

The OVFL (LINRX Overflow) Flag will be set when a byte is received in the LINRX register before the

previous byte has been read. As the system is responsible for reading the register before a new byte arrives

this indicates a problem with CPU load. The flag can be cleared by writing it with 1.

31.10.10 Using the eSCI in 9-bit data mode

Sometimes it is desirable to set the 9th data bit for each write and to retrieve the 9th data bit for each read.

This can be accomplished by defining the data structure for the SCI Data Registers (see Figure 31-8 and

Figure 31-9) appropriately.

Normally the header files for the eSCI are defined as in the example below:

...

volatile reg8 sci_SCIDRH;

/* SCIx_REGISTER_MAP_OFFSET + 0x06 */

volatile reg8 sci_SCIDRL;

/* SCIx_REGISTER_MAP_OFFSET + 0x07 */

...

This format requires to access the data register with two writes or two reads, respectively - e.g.:

SCI_A->sci_SCIDRH = tx_dat8;

SCI_A->sci_SCIDRL = tx_dat7_0;

rx_dat8_0 = SCI_A->sci_SCIDRH <<1 | SCI_A->sci_SCIDRL;

For more efficient access the header files can be written like this:

...

volatile reg16 sci_SCIDR;

/* SCIx_REGISTER_MAP_OFFSET + 0x06 */

...

Now a single write or read can be used to access all 9 bits:

SCI_A->sci_SCIDR = tx_dat8_0;

rx_dat8_0 = SCI_A->SCIDR;

(Note that the 9th data bit is in position 6 for TX and position 7 for RX, so some re-formatting may be

necessary.)

If the 9th bit is unused or only written and read occassionally, the declaration with two 8 bit registers is

preferrable. However if the 9th bit needs to be written and read on every access to the SCI data register the

declaration with a single 16 bit register is more effecient.

31.10.11 Using the LIN hardware

The eSCI provides special support for the LIN protocol. It can be used to automate most tasks of a LIN

master. In conjunction with the DMA interface it is possible to transmit entire frames (or sequences of

frames) and receive data from LIN slaves without any CPU intervention. There is no special support for

LIN slave mode, if required it could be implemented in software.

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