MAC7200 datasheet(752/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

674

Freescale Semiconductor

Figure 31-40. DMA transfer of a RX frame

31.10.11.3 Features of the LIN Hardware

The LIN hardware has several features to support different revisions of the LIN slaves. In the TX register

it can be configured whether header bits should be included in the checksum (on a frame by frame basis,

to support LIN slaves with different LIN revisions). The LIN control register allows to decide whether the

parity bits in the ID field should be calculated automatically, and whether double stop flags should be

inserted after a Bit Error. The BRK13 bit in the SCI control register 3 decides whether to generate 10 or

13 bit break characters.

The application software can decide to turn off the checksum generation/verification on a per frame basis

and handle that function on its own. Also it can decide to let the LIN hardware append two CRC Bytes

(Figure 31-41). These are not part of the LIN standard, but could be part of the application layer i.e. the

would be treated as data bytes by the LIN protocol. This can be useful when very long frames are

transmitted. By default the CRC polynom used, is the same polynom as for the CAN protocol.

Figure 31-41. LIN frame with CRC bytes

Break

Sync

Data

CSum

. . .

Memory

DMA

Controller

LIN SCI

RX Register

Length

Control / Timeout

Timeout

Data n

Data 1

TX DMA channel

LIN Frame

TX Register

RX DMA

from Master

from Slave

channel

Break

Sync

Data

CRC 1

. . .

CSum

CRC 2

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