MAC7200 datasheet(753/976 Pages) FREESCALE

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Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

675

It is possible to force a resync of the LIN FSM, with the LRES bit in the LIN control register, however

normally the LIN hardware will automatically abort a frame after detecting a bit error.

31.10.11.4 LIN Error Handling

The LIN hardware can detect several error conditions of the LIN protocol. It will receive every byte that

was transmitted, and compare it with the intended values. If there is a mismatch, a bit error will be raised,

and the LIN FSM will return to its start state.

For a RX frame the LIN hardware can detect a slave timeout error - the exact value can be set via the

timeout bits in the TX register. If the frame is not complete within the number of clock cycles specified

there, the LIN FSM will return to its start state, and the STO (Slave Time-Out) interrupt will be raised.

The LIN protocol supports a sleep mode - after 25000 bus cycles of inactivity the bus is assumed to be in

sleep mode. Normally entering sleep mode can be avoided, if the LIN master is regularly creating some

bus activity. Otherwise the timeout state needs to be detected by the application software - e.g. by setting

a timer.

Both LIN masters and LIN slaves can cause the bus to exit sleep mode by sending a break signal. The LIN

hardware will generate such a break, when the WU bit in the LIN control register is written. After

transmitting this break the LIN hardware will not send out data (i.e. not raise the TXRDY flag) before the

Wakeup Delimiter period has expired. This period can be selected by setting the WUD bits in the LIN

control register.

Break signals sent by a LIN slave are detected by the LIN hardware, and indicated by setting the WAKE

flag in the LIN status register.

A Physical Bus Error (LIN bus is permanently stuck at a fixed value) will set several error flags. If the

input is permanently low, the eSCI will set the Framing Error Flag (FE) in the SCI status register. If the

RX input remains stuck at a fixed value for 15 cycles, after a transmission has started, the LIN hardware

will set the PBERR flag in the LIN status register. In addition a bit error may be generated.

31.10.11.5 LIN Wakeup

The LIN hardware automatically detects LIN 1.x wakeup characters and can generate them with the WU

bit in LINCTRL1. For LIN 2.0 wakeup characters the requirements are more flexible - instead of a 80h

character at the currently selected baudrate, the spec requires a low pulse of 250

μs to 5 ms. For this the

baud rate needs to be set to 32k down to 1.6k baud.

So in order to generate a valid wakeup character according to LIN 2.0, the eSCI first needs to be

programmed to a baud rate lower than 32 kBaud, then WU can be set. Should the application require a

higher baud rate, then this rate can be set once the wakeup character has been transmitted.

For wakeup detection the length of the wakeup pulse depends on the LIN slave node. A wakeup which

does not conform to LIN 1.3 will show up as a frame error FE. Provided that the low pulse is longer than

8 bit times (this can be controlled by determining the baud rate), the LWAKE flag will be also be set. The

application then needs to wait until the wakeup pulse has completed (e.g. wait until 5 ms have expired)

and clear the FE and LWAKE bits. A further 100 ms wait may be required to ensure that all connected

MAC7200 Datasheet(PDF) 753 Page - Freescale Semiconductor, Inc

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