MAC7200 datasheet(755/976 Pages) FREESCALE

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MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

677

Chapter 32

Modular I/O Subsystem (eMIOS)

32.1

Introduction

The Enhanced Modular Input/Output Subsystem has a similar architecture to that of the Modular

Input/Output Subsystem (MIOS) previously implemented on other Freescale devices. This module has an

interface to the peripheral bus that communicates to timer channel sub-modules on a local inter-module

bus with the sub-modules providing the timer and counter functions needed by the applications. Common

time bases can be shared between sub-modules using counter buses in order to offer synchronous

operation. The most notable difference of the eMIOS implementation is the introduction of the Unified

Channel sub-module. The eMIOS is constructed with only Unified Channels, which provide all of the

required timer functions. This provides a more flexible implementation to that of its predecessor, the

MIOS, where different sub-modules would provide a much narrower range of functions. Each Unified

Channel is identical and can be configured to provide a wide range of timer functions.

On MAC72x2, the eMIOS has 8 Unified timer Channels with all channel counters being 16-bits wide. The

module implements 2 counter buses: Counter bus A and Counter bus B. Counter bus A is driven by Unified

channel 7 and can be shared across all Unified Channels. Counter bus B is driven by channel 0 and can be

shared across all Unified Channels.

On MAC72x1, the eMIOS has 16 Unified timer Channels with all channel counters being 16-bits wide.

The module implements 3 counter buses: Counter bus A, Counter bus B and Counter bus C. Counter bus

A is driven by Unified channel 15 and can be shared across all Unified Channels. Counter bus B is driven

by channel 0 and can be shared across Channels 0-7. Counter bus C is driven by channel 8 and can be

shared across Channels 8-15.

Counter bus A cannot be driven from a Shared Timer And Counter (STAC), as no STAC is implemented

on the MAC7200 family of devices.

A single timer pin is shared for each of the Unified Channels input and output signals. This results in a

timer with 8 external pins available for the user. The eMIOS output disable channels are assigned to

Unified channel 0, 1, 2 and 3, and are used to drive the MTS_ODIS_0, MTS_ODIS_1, MTS_ODIS_2 and

MTS_ODIS_3 respectively in order to disable the channels output based on the ODIS and ODISSL[0:1]

bits in the channel control register MTSCn.

The eMIOS module can be independently disabled by writing to the MDIS bit in the module’s MCR

(MTSMCT, MTSOUDIS & MTSUCDIS) remain available to be accessed by the core across the peripheral

bus. The MDIS bit is intended to be used when the module is not required in the application. By default,

the eMIOS is disabled after reset (MDIS=1), so the MDIS bit must be cleared, prior to use.

MAC7200 Datasheet(PDF) 755 Page - Freescale Semiconductor, Inc