MAC7200 datasheet(762/976 Pages) FREESCALE

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External Signal Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

684

Freescale Semiconductor

32.11 External Signal Description

32.11.1 Overview

While each Unified Channel has one external input and one external output signal, as described in

Table 32-3, on the MAC72xx, the input and output signals for each channel are connected to a single

bidirectional pin EMIOSn (see Chapter 34, “Port Integration Module (PIM_MAC7202)”).

32.11.2 Detailed Signal Descriptions

32.11.2.1 EMIOSIn - eMIOS Unified Channel Input Signal

EMIOSIn is synchronized and filtered by the input programmable filter (IPF). The output of the IPF is then

used by the channel logic and is available to be read by the MCU through the UCIN bit of the UCSRn

32.11.2.2 EMIOSOn - eMIOS Unified Channel Output Signal

EMIOSOn is a registered output and is available for reading by the MCU through the UCOUT bit of the

UCSRn register.

32.12 Memory Map/Register Definition

32.12.1 Memory Map

Addresses of Unified Channel registers are specified as offsets from the channel’s base address, otherwise

the eMIOS base address is used as reference.

The overall address map organization is shown in Table 32-4. Table 32-5 describes the Unified Channel

registers.

Attempts to access reserved addresses will result in a bus abort exception.

Table 32-3. External signals

Signal

Direction

Function

Reset State

Pull up

EMIOSIn

input

eMIOS Unified Channel n input

chip dependent

EMIOSOn

output

eMIOS Unified Channel n output

0/ Hi-Z1

1. Value “0” refers to the reset value of the signal. Hi-Z refers to the state of the external pin if a tristate output buffer is

controlled by the corresponding ipp_obe_mts_ucn signal.

chip dependent

Table 32-4. eMIOS Memory Map

eMIOS Addresses

0x0000–0x0003

Module Configuration register (MCR)

0x0004–0x0007

Global FLAG register (GFLAG)

0x0008–0x000B

Output Update Disable (OUDIS)

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