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MAC7200 Datasheet(PDF) 766 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 766 Page - Freescale Semiconductor, Inc |
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766 / 976 page ![]() Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 688 Freescale Semiconductor 32.12.2.3 eMIOS Output Update Disable (OUDIS) Address eMIOS base address + 0x04 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R 00000 0 0000000000 W Reset: 00000 0 0000000000 15 14 13 12 11 10 9876543210 R 00000 0 0 0 F7 F6 F5 F4 F3 F2 F1 F0 W Reset: 00000 0 0000000000 = Unimplemented or Reserved Figure 32-4. eMIOS Global FLAG Register (GFLAG) Address eMIOS base address + 0x08 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R 00000 0 0000000000 W Reset: 00000 0 0000000000 15 14 13 12 11 10 9876543210 R 00000 0 0 0 OU7 OU6 OU5 OU4 OU3 OU2 OU1 OU0 W Reset: 00000 0 0000000000 = Unimplemented or Reserved Figure 32-5. eMIOS Output Update Disable Register (OUDIS) Table 32-8. OUDIS Field Descriptions Field Descriptions 31–8 Reserved, should be cleared. 7–0 OUn Channel n Output Update Disable bit. When running MC mode or an output mode, values are written to registers A2 and B2. OUn bits are used to disable transfers from registers A2 to A1 and B2 to B1. Each bit controls one channel. 0 Transfer enabled. Depending on the operation mode, transfer may occur immediately or in the next period. Unless stated otherwise, transfer occurs immediately. 1 Transfers disabled |
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