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MAC7200 Datasheet(PDF) 767 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 767 Page - Freescale Semiconductor, Inc |
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767 / 976 page ![]() Memory Map/Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 689 32.12.2.4 eMIOS Disable Channel (UCDIS) 32.12.2.5 eMIOS A Register (UCAn) Depending on the mode of operation, internal registers A1 or A2, used for matches and captures, can be assigned to address UCAn. Both A1 and A2 are cleared by reset. Figure 32-10 summarizes the UCAn writing and reading accesses for all operation modes. For more information see Section 32.13.1.1, “UC Modes of Operation”. Address eMIOS base address + 0x0C 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 R 00000 0 0000000000 W Reset: 15 14 13 12 11 10 9876543210 R 00000 0 0 0 W Reset: 00000000 = Unimplemented or Reserved Figure 32-6. eMIOS Enable Channel Register (UCDIS) Table 32-9. OUDIS Field Descriptions Field Descriptions 31–8 Reserved, should be cleared. 7–0 UCDISn Enable Channel n bit. The UCDISn bit is used to disable each of the Unified Channels by stopping its respective clock. 0 Unified Channel n enabled 1 Unified Channel n disabled |
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