MAC7200 datasheet(764/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

686

Freescale Semiconductor

Address

eMIOS base address + 0x00

MDIS

FRZ GTBE

0000000

Reset:

1. In MAC7200, the eMIOS is disabled after reset (MDIS = 1). This bit must be cleared after reset to enable the eMIOS.

000

0000000000

9876543210

GPRE[7:0]

00000000

Reset:

00000

0000000000

= Unimplemented or Reserved

Figure 32-3. eMIOS Module Configuration Register (MCR)

Table 32-6. MCR Field Descriptions

Field

Descriptions

DOZEEN

Doze Enable bit. Enable the eMIOS to enter low power mode when Doze Mode is requested at MCU level. The

doze mode is used to stop the clock of the block, except the access to registers MCR, OUDIS and UCDIS.

0 Not enable to enter low power mode when Doze Mode is requested.

1 Enable to enter low power mode when Doze Mode is requested

MDIS

Module Disable bit. Puts the eMIOS in low power mode. The MDIS bit is used to stop the clock of the block, except

the access to registers MCR, OUDIS and UCDIS.

0 Clock is running.

1 Enter low power mode.

FRZ

Freeze bit. Enable the eMIOS to freeze the registers of the Unified Channels when Debug Mode is requested at

MCU level. Each Unified Channel should have FREN bit set in order to enter freeze mode. While in Freeze mode,

the eMIOS continues to operate to allow the MCU access to the Unified Channels registers. The Unified Channel

will remain frozen until the FRZ bit is written to zero or the MCU exits Debug mode or the Unified Channel FREN

bit is cleared.

0 Exit freeze mode.

1 Stops Unified Channels operation when in Debug mode and the FREN bit is set in the UCCRn register

GTBE

Global Time Base Enable bit. The GTBE bit is used to export a Global Time Base Enable from the module and

provide a method to start time bases of several blocks simultaneously.

1 Global Time Base Enable Out signal asserted

0 Global Time Base Enable Out signal negated

Note: The Global Time Base Enable input pin controls the internal counters. When asserted, Internal counters are

enabled. When negated, Internal counters disabled.

Reserved, should be cleared.

MAC7200 Datasheet(PDF) 764 Page - Freescale Semiconductor, Inc

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