Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

MAC7200 Datasheet(PDF) 769 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 769 Page - Freescale Semiconductor, Inc

Back Button MAC7200 Datasheet HTML 765Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 766Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 767Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 768Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 769Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 770Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 771Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 772Page - Freescale Semiconductor, Inc MAC7200 Datasheet HTML 773Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 769 / 976 page
background image
Memory Map/Register Definition
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
691
32.12.2.7 eMIOS Counter Register (UCCNTn)
The UCCNTn register contains the value of the internal counter. When GPIO mode is selected or the
channel is frozen, the UCCNTn register is read/write. For all others modes, the UCCNTn is a read-only
register. When entering some operation modes, this register is automatically cleared (refer to
Section 32.13.1.1, “UC Modes of Operation” for details).
SAOC1
A2
A1
B2
B2
-
IPWM
-
A2
-
B1
-
IPM
-
A2
-
B1
-
DAOC
A2
A1
B2
B1
-
PEA
A1
A2
-
B1
-
PEC1
A1
A1
B1
B1
A2
QDEC1
A1
A1
B2
B2
-
WPTA
A1
A1
B1
B1
A2
MC1
A2
A1
B2
B2
-
OPWFM
A2A1B2B1
-
OPWMC
A2A1B2B1
-
OPWM
A2
A1
B2
B1
-
MCB1
A2
A1
B2
B2
-
OPWFMB
A2
A1
B2
B1
-
OPWMCB
A2
A1
B2
B1
-
OPWMB
A2A1B2B1
-
1. In these modes, the register UCBn is not used, but B2 can be accessed.
Address UCn base address + 0x08
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
000000000000000
0
W1
1. In GPIO mode or Freeze action, this register is writable.
Reset:
000000000000000
0
15
14
13
12
11
10
9876543210
R
C[15:0]
W1
Reset:
000000000000000
0
= Unimplemented or reserved
Figure 32-9. eMIOS Counter Register (UCCNTn)
Table 32-10. UCAn, UCBn and ALTAn values assignment



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com