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MAC7200 Datasheet(PDF) 771 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 771 Page - Freescale Semiconductor, Inc

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Memory Map/Register Definition
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
693
29–28
ODISSL[1:
0]
The ODISSL[1:0] bits select one of the four output disable input signals, as shown in Table 32-12.
27–26
UCPRE[1:
0]
Prescaler bits . The UCPRE[1:0] bits select the clock divider value for the internal prescaler of Unified Channel, as
shown in Table 32-13.
25
UCPREN
Prescaler Enable bit. The UCPREN bit enables the prescaler counter.
0 Prescaler disabled (no clock) and prescaler counter is loaded with UCPRE[1:0] value
1 Prescaler enabled
24
DMA
Direct Memory Access bit . The DMA bit selects if the FLAG generation will be used as an interrupt or as a DMA
request.
0 FLAG assigned to Interrupt request
1 FLAG assigned to DMA request
23
Reserved, should be cleared.
Table 32-11. UCCRn Field Descriptions (Continued)
Table 32-12. ODISSL Selection
ODISSL[1:0]
input signal
00
Output Disable Input 0
01
Output Disable Input 1
10
Output Disable Input 2
11
Output Disable Input 3
Table 32-13. UC Internal Prescaler Clock Divider
UCPRE[1:0]
Divide ratio
00
1
01
2
10
3
11
4



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