MAC7200 datasheet(775/976 Pages) FREESCALE

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Memory Map/Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

697

11000b0

Output Pulse Width Modulation Buffered

others

Reserved

1. b = adjust parameters for the mode of operation. Refer to section Section 32.13.1.1, “UC Modes of

Operation” for details.

Address UCn base address + 0x10

R OVR

00000000000000

Reset:

000000000000000

9876543210

OVFL

000000000000

UCIN

FLAG

W OVFL

Reset:

000000000000000

= Unimplemented or reserved

Figure 32-11. eMIOS Status Register (UCSRn)

Table 32-17. UCSRn Field Descriptions

Field

Descriptions

OVR

OVRC

OVR — Overrun bit

The OVR bit indicates that FLAG generation occurred when the FLAG bit was already set.

0 Overrun has not occurred 1Overrun has occurred

OVRC — Overrun Clear bit

The OVR bit can be cleared either by clearing the FLAG bit or by writing a 1 to the OVRC bit.

0 Do not change OVR bit

1 Clear OVR bit

30–16

Reserved, should be cleared

Table 32-16. MODE Bits

MODE[6:0]1

mode of operation (Continued)

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