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MAC7200 Datasheet(PDF) 789 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 789 Page - Freescale Semiconductor, Inc

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Functional Description
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
711
32.13.1.1.10 Windowed Programmable Time Accumulation (WPTA) Mode
The WPTA mode accumulates the sum of the total high time or low time of an input signal over a
programmable interval (time window).
The prescaler bits UCPRE[1:0] in UCCRn register define the increment rate of the internal counter.
Register A1 holds the start time and register B1 holds the stop time of the programmable time interval.
When a match occurs between register A and the selected timebase, the internal counter is cleared and it
is ready to start counting. The internal counter is used as a time accumulator, i.e., it counts up when the
input signal has the same polarity of EDPOL bit in UCCRn register and does not count otherwise. When
a match occurs in comparator B, the internal counter is disabled regardless of the input signal polarity and
the FLAG bit is set. At the same time the content of UCCNTn is transferred to register A2. Reading
registers UCCNTn or A2 returns the high or low time of the input signal,
Note that UCCNTn is stable only outside the time window defined from A1 to B1 matches, otherwise its
contents reflects a count in progress and not the final value. Alternatively to UCCNTn register A2 returns
the latest available measurement. Since this register is updated only at comparator B matches it always
contains stable and up-to-date data. In this mode this register is accessible through the alternate register
address ALTAn.
Figure 32-29 shows how the Unified Channel can be used to accumulate high time.
Figure 32-29. Windowed Programmable Time Accumulation example
32.13.1.1.11 Modulus Counter (MC) Mode
The MC mode can be used to provide a time base for a counter bus or as a general purpose timer.
MODE[0] bit selects internal or external clock source when cleared or set, respectively. When external
clock is selected, the input signal pin is used as the source and the triggering polarity edge is selected by
the EDPOL and EDSEL in the UCCRn register.
$FFFFFF
$000000
Time accumulator (UCCNT)
B1 Match
selected counter bus
$001500
A1 value2
$001500
$000100 $000100
input signal1
$004200
$003000
B1 Match
B1 value3
$001500
$004200
$000100
A1 Match
A1 B1 write
A1 Match
A1 B1 write
$003000
$004200
FLAG set event
Notes: 1. After the input filter
EDPOL = 1
2. UCAn = A1
3. UCBn = B1
$003000
A2 value4
UCCNTn
UCCNTn
4 ALTAn = A2
A2
A2



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