MAC7200 datasheet(803/976 Pages) FREESCALE

803 / 976 page

Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

725

Figure 32-47. Output PWMCB with Trail Dead Time Insertion

FLAG can be generated in the trailing edge of the output PWM signal when MODE[1] is cleared, or in

both edges, when MODE[1] is set. If subsequent matches occur on comparators A and B, the PWM pulses

continue to be generated, regardless of the state of the FLAG bit.

NOTE

In OPWMCB mode FORCMA and FORCMB do not have the same

behavior as a regular match. Instead they force the output flip-flop to

constant value which depends upon the selected dead time insertion mode,

lead or trail and the value of the EDPOL bit.

FORCMA has different behaviors depending upon the selected dead time insertion mode, lead or trail. In

lead dead time insertion FORCMA force a transition in the output flip-flop to the opposite of EDPOL. In

trail dead time insertion the output flip-flop is forced to the value of EDPOL bit.

If FORCMB bit is set, the output flip-flop value depends upon the selected dead time insertion mode. In

lead dead time insertion FORCMB forces the output flip-flop to transition to EDPOL bit value. In trail

dead time insertion the output flip-flop is forced to the opposite of EDPOL bit value.

NOTE

FORCMA bit set does not set the internal time-base to 0x000001 as a

regular A1 match.

EDPOL = 1

internal

time

base

internal counter is

set to 1 on A1 match

dead-time

A1 value

A2 value

B1 value

B2 value

write to B2

selected

counter bus

$000002

$000004

$000002

$000004

$000015

write to A2

$000013

$000001

$000002

$000004

$000015

$000013

$000020

dead-time

output flip-flop

FLAG set event

$000001

MAC7200 Datasheet(PDF) 803 Page - Freescale Semiconductor, Inc

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