| Electronic Components Datasheet Search |
|
MAC7200 Datasheet(PDF) 831 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MAC7200 Datasheet(HTML) 831 Page - Freescale Semiconductor, Inc |
|
831 / 976 page ![]() Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 Freescale Semiconductor 753 time is used to detect a broken sensor connection. For further details about the predischarge feature please see Section 33.11.7, “Conversions Using Predischarge”. 33.10.2.7 ATD Interrupt Register (ATDINT) This register contains the interrupt enable bits corresponding to the flags in the ATDFLAG register. If a flag is set and the interrupt enable bit for this flag is also set, an interrupt will be asserted to the system interrupt controller. Address Base + 0x08 Access: User read/write 76 54 321 0 R 0 0 0 0 TIME W Reset 000 00 000 Figure 33-7. ATD Predischarge Time Select Register (ATDPTS) Table 33-12. ATDPTS Field Descriptions Field Description 7–4 Reserved, should be cleared. 3–0 TIME Defines the time during which the sample capacitor will be discharged. During this time also the parasitic capacities of the current ATD channel will be discharged. The time can be selected between 2 ATD clock cycles and 16 ATD clock cycles (TIME = 0x01..0x0F). TIME = 0x00 also means 2 ATD clock cycles discharge time. The ATD channel which will also be predischarged is defined by the CWCH bits of the current command word. The following scenarios are possible: • When the current command word selects any channel and the feature ‘special channel’ is not set then the channel selected by the CWCH bits will be discharged. • When the current command word selects one of the ATD reference voltage channels only the sample capacitor is discharged. The predischarge feature can be enabled via the ATDMODE.PRED bit. Please see Section 33.10.2.4, “ATD Operating Modes Register (ATDMODE)”. If the feature is disabled the bit values in this register are ignored. For further details about the Predischarge feature please refer to Section 33.11.7, “Conversions Using Predischarge”. Address Base + 0x0E Access: User read/write 76 54 321 0 R 0 CQNFIE CQFIE CQEIE CRLIE ETOIE CPIE CCIE W Reset 010 00 000 Figure 33-8. ATD Interrupt Register (ATDINT) |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |