MAC7200 datasheet(835/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

757

•

Conversion reset:

This conversion mode is intended to abort a running conversion. The conversion is aborted

immediately after writing the command word. All bits in the command word beside the CWCM

bits are ignored.

If the aborted conversion was either “convert continuously” or “wait for trigger” the ATD will

assert a DMA request for a new command. If the aborted conversion was “convert then pause” the

26–25

CWSL

Command word sample length. Selects the length of the sample time measured in ATD clock cycles.

00 Sample time of 2 ATD clock periods

01 Sample time of 8 ATD clock periods

10 Sample time of 64 ATD clock periods

11 Sample time of 128 ATD clock periods

24–21

CWNF

Command word numeric format. Determines the numeric format in which the conversion result is stored. The

following tables provide settings for the various available formats.

20–16

CWCH

Command word channel. Determines the input channel that will be sampled. Table 33-18 gives a detailed overview

how to configure CWCH for the desired channel.

15–0

Reserved, should be cleared.

Table 33-16. Conversion Mode Selection Table

CWCM[1:0]

Conversion mode

Conversion reset

Convert then pause

Wait for trigger

Convert continuously

Table 33-15. ATDCW Field Descriptions (Continued)

Field

Descriptions

CWNF[1:0]

Conversion Result Numeric Format (Sign/Alignment)

Right justified and unsigned

Right justified and signed

Left justified and unsigned

Left justified and signed

CWNF[3:2]

Conversion Result Numeric Format (Resolution)

8 Bit

10 Bit

11 Bit

12 Bit

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