MAC7200 datasheet(832/976 Pages) FREESCALE

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Memory Map and Register Definition

MAC7200 Microcontroller Family Reference Manual, Rev. 2

754

Freescale Semiconductor

33.10.2.8 ATD Flag Register (ATDFLAG)

This register contains the interrupt flags for the ATD module. When an event occurs (e.g. a conversion

finished), the appropriate interrupt flag bits is set. If the interrupt enable bit corresponding to the flag is

also set, an interrupt will be asserted to the system interrupt controller. See 33.10.2.7 ATD Interrupt

A flag can be cleared by writing a ‘1’ to it. Writing a ‘0’ has no effect. During a low-power mode, the flags

can not be cleared. For further details about low-power modes please see Section 33.11.4, “Low Power /

Operating Modes”.

Table 33-13. ATDINT Field Descriptions

Field

Description

Reserved, should be cleared.

CQNFIE

Command queue not full interrupt enable. Enables/disables the interrupt for CQNF (command queue not full).

0 CQNF interrupt is disabled. If CQNF is ‘1’ no interrupt will be generated

1 CQNF interrupt is enabled. If CQNF is ‘1’ an interrupt will be generated

CQFIE

Command queue full interrupt enable. Enables/disables the interrupt for CQF (command queue full).

0 CQF interrupt is disabled. If CQF is ‘1’ no interrupt will be generated

1 CQF interrupt is enabled. If CQF is ‘1’ an interrupt will be generated

CQEIE

Command queue empty interrupt enable. Enables/disables the interrupt for CQE (command queue empty).

0 CQE interrupt is disabled. If CQE is ‘1’ no interrupt will be generated

1 CQE interrupt is enabled. If CQE is ‘1’ an interrupt will be generated

CRLIE

Conversion result lost interrupt enable. Enables/disables the interrupt for CRL (conversion result lost).

0 CRL interrupt is disabled. If CRL is ‘1’ no interrupt will be generated

1 CRL interrupt is enabled. If CRL is ‘1’ an interrupt will be generated

ETOIE

External trigger overrun interrupt enable. Enables/disables the interrupt for ETO (external trigger overrun).

0 ETO interrupt is disabled. If ETO is ‘1’ no interrupt will be generated

1 ETO interrupt is enabled. If ETO is ‘1’ an interrupt will be generated

CPIE

Conversion paused interrupt enable. Enables/disables the interrupt for CP (conversion paused).

0 CP interrupt is disabled. If CP is ‘1’ no interrupt will be generated

1 CP interrupt is enabled. If CP is ‘1’ an interrupt will be generated

CCIE

Conversion complete interrupt enable. Enables/disables the interrupt for CC (conversion complete).

0 CC interrupt is disabled. If CC is ‘1’ no interrupt will be generated

1 CC interrupt is enabled. If CC is ‘1’ an interrupt will be generated

Address Base + 0x0F

Access: User read/write

321

CQNF

CQF

CQE

CRL

ETO

Reset

010

000

Figure 33-9. ATD Flag Register (ATDFLAG)

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