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MAC7200 Datasheet(PDF) 838 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 838 Page - Freescale Semiconductor, Inc |
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838 / 976 page  Memory Map and Register Definition MAC7200 Microcontroller Family Reference Manual, Rev. 2 760 Freescale Semiconductor Please note that the voltage ranges used for the examples shown in Table 33-17 have been selected in a way to produce understandable results. The maximum voltage values (Vmax) may be outside of the valid range. For further details about the (conversion) characteristics of the ATD, please refer to Section A.16, “Analog-to-Digital Converter Characteristics”. The “regular” printed bits represent the bits used to fill an 8-bit value to a 16-bit value. The bits printed in “bold” represent the bits determined by the analog-to-digital conversion. Table 33-17. Numeric Examples for Result Values Voltage #1 Voltage #2 Right justified unsigned 8 Bit Right justified signed 8 Bit Left justified unsigned 8 Bit Left justified signed 8 Bit 5.090..5.120 2.530..2.560 0b00000000'11111111 0b00000000'01111111 0b11111111'00000000 0b01111111'00000000 5.070..5.090 2.510..2.530 0b00000000'11111110 0b00000000'01111110 0b11111110'00000000 0b01111110'00000000 5.050..5.070 2.490..2.510 0b00000000'11111101 0b00000000'01111101 0b11111101'00000000 0b01111101'00000000 5.030..5.050 2.470..2.490 0b00000000'11111100 0b00000000'01111100 0b11111100'00000000 0b01111100'00000000 :: :: : : 2.590..2.610 0.030..0.050 0b00000000'10000010 0b00000000'00000010 0b10000010'00000000 0b00000010'00000000 2.570..2.590 0.010..0.030 0b00000000'10000001 0b00000000'00000001 0b10000001'00000000 0b00000001'00000000 2.550..2.570 -0.010..0.010 0b00000000'10000000 0b00000000'00000000 0b10000000'00000000 0b00000000'00000000 2.530..2.550 -0.030..-0.010 0b00000000'01111111 0b11111111'11111111 0b01111111'00000000 0b11111111'00000000 2.510..2.530 -0.050..-0.030 0b00000000'01111110 0b11111111'11111110 0b01111110'00000000 0b11111110'00000000 2.490..2.510 -0.070..-0.050 0b00000000'01111101 0b11111111'11111101 0b01111101'00000000 0b11111101'00000000 :: :: : : 0.050..0.070 -2.510..-2.490 0b00000000'00000011 0b11111111'10000011 0b00000011'00000000 0b10000011'00000000 0.030..0.050 -2.530..-2.510 0b00000000'00000010 0b11111111'10000010 0b00000010'00000000 0b10000010'00000000 0.010..0.030 -2.550..-2.530 0b00000000'00000001 0b11111111'10000001 0b00000001'00000000 0b10000001'00000000 0.000..0.010 -2.560..-2.550 0b00000000'00000000 0b11111111'10000000 0b00000000'00000000 0b10000000'00000000 Table 33-18. Channel Selection Table CWSC CWCH[4:0] Sampled voltage 0 0b0_0000 .. 0b1_1111 ATD channel defined by CHWCH[4:0] 1 0b0_0000 .. 0b0_0111 Reserved 1 0b0_1000 ATD reference voltage VRH 1 0b0_1001 ATD reference voltage VRL 1 0b0_1010 ATD reference voltage 50% x (VRH - VRL) 1 0b0_1011 ATD reference voltage 75% x (VRH - VRL) 1 0b0_1100 ATD reference voltage 25% x (VRH - VRL) 1 0b0_1101 .. 0b1_1111 Reserved |
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