MAC7200 datasheet(866/976 Pages) FREESCALE

866 / 976 page

Initialization/Application Information

MAC7200 Microcontroller Family Reference Manual, Rev. 2

788

Freescale Semiconductor

Each write to either the ATDTRIGCTL or ATDETRIGCH register will stop any conversion that may be

executing. For this example it is assumed that the registers have been configured previously and no

conversions were being executed.

All command words use the same setting:

•CMD #n: CWCW = “wait for trigger”

When the first command word is written to the ATDCW register, the CSM will move from state C1 to C2,

where it will wait for a high level on the analog input channel 7. When this trigger arrives, the CSM will

transition from state C2 to C3 and the actual conversion will be executed (as described in Section 33.12.3.1,

“Example 1: A Simple Conversion,” to Section 33.12.3.3, “Example 3: Interrupted Conversion

Sequence”).

The second command word is executed in the same way. During the conversion the trigger is deasserted.

Even so the conversion will complete. But as the trigger was deasserted the third conversion will not start

after the second one finished. It will start once the trigger is asserted again.

Figure 33-30 shows the conversion procedure for this example:

Figure 33-32. Conversion Procedure for Example 4

Like for the edge-triggered conversions the minimum trigger length is one system clock cycle. Although

it is not recommended to use a level-sensitive trigger with such a short trigger pulse. Generally, a

level-sensitive trigger is used to control how long conversions should be executed.

Due to synchronization and internal processing, the conversion start is delayed by 4 system clock cycles:

Figure 33-33. ATD Level-Based Minimum Trigger

empty

cmd #2

cmd #1

empty

cmd #3

rst #1

empty

RX request

Write ATDCW

ATDCW

ATDCC

ATDRR

TX request

Read ATDRR

Conv. complete

cmd #2

rst #2

empty

cmd #4

cmd #3

wait for trig.

convert

Conv. state

idle

Trigger

wait for trig.

convert

Trigger

Conversion

Status

idle

converting

sys. clk

converting

idle

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