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MAC7200 Datasheet(PDF) 910 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 910 Page - Freescale Semiconductor, Inc |
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910 / 976 page ![]() Functional Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 832 Freescale Semiconductor 34.7.2 Peripheral Mode In Peripheral mode, the peripheral functionality associated with the pin(s) are under the control of the peripheral itself. Peripheral mode is set on a particular pin by setting the MODE bit in the pin’s corresponding CONFIGxx register (See Section 34.8.1, “Using a Pin in Peripheral Mode,” for an example). In Peripheral mode, the following register bits are unused: • DDR (CONFIGxx[6]) • ODER (CONFIGxx[5]) • PIER (CONFIGxx[1]) • PIFR (CONFIGxx[0]) NOTE Even though the above bits are unused in this mode, they can still be written to. The new values will take effect once the mode of the pin is switched to GPI or GPO mode. In addition, the corresponding bit in the PIFR register will not be changed while the pin is in Peripheral mode. While in Peripheral mode, the data registers PORTDATA, PORTIR and PINDATAxx may be used as follows: Figure 34-19 illustrates the anatomy of a single PIM pad cell in Peripheral mode. Table 34-46. PIM Register Behavior in Peripheral Mode Register Write Read PORTDATA Writing to the corresponding bit in the PORTDATA register will not drive the value onto the pin, but it will set/clear the bit in the register. When the pin is switched to General Purpose Output mode, the new value will be driven onto the pin. The value read from the PORTDATA register in Peripheral mode depends on the current setting of the pin’s DDR (Data Direction) bit. • DDR = 1 (Output) - Returns the actual value in the current PORTDATA register. • DDR = 0 (Input) - Returns the value driven on the pin, synchronized to the system clock. This is identical to reading the corresponding bit in the PORTIR register. PORTIR Writing to the PORTIR register will have no effect, as it is a read-only register in all modes. Reading from the PORTIR register will return the value on the pin. Note that this value is internally synchronized to the system clock, and that there is a two clock cycle delay between the changing of the value on the pin, and the update of the PORTIR register. PINDATAxx Writing to the PINDATAxx register is identical to writing the corresponding bit in the PORTDATA register. Reading from the PINDATAxx register is identical to reading the corresponding bit from the PORTDATA register. |
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