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MAC7200 Datasheet(PDF) 912 Page - Freescale Semiconductor, Inc |
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MAC7200 Datasheet(HTML) 912 Page - Freescale Semiconductor, Inc |
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912 / 976 page ![]() Functional Description MAC7200 Microcontroller Family Reference Manual, Rev. 2 834 Freescale Semiconductor NOTE Currently, only pins PA8 and PA9 allow usage of non-primary peripheral mode. For all other pins only MODE[1:0] values of 2’b00 or 2’b01 are allowed. This table shows that the chips select lines 3 and 4 from DSPI B are available on pins PG14 and PG15 (with MODE[1:0] = 2’b01) as well as on pins PA8 and PA9 if those are configured to use their secondary peripheral function (i.e. MODE[1:0] = 2’b10). 34.7.3.1 Driving Multiple Outputs It is possible to drive the same peripheral outputs on multiple pins. If this is not desired, it is the responsibility of the user to ensure that the PIM is not configured in this manner. As an example, if pin PA8 was configured to be in Secondary Peripheral Mode, the DSPI_B CS3 would be driven out on both PA8 and PG15 simultaneously. 34.7.3.2 Input Multiplexing - Priorities It is not possible to drive the same peripheral input from multiple pins. In the case where the PIM is configured in this manner, the following priority scheme will determine which pin will drive the input: Table 34-47. MODE[1:0] Values Value Mode 00 GPIO Mode 01 Primary Peripheral Mode 10 Secondary Peripheral Mode 11 Tertiary Peripheral Mode Table 34-48. Peripheral Pins that can be Multiplexed Pin Primary Peripheral Function Secondary Peripheral Function Tertiary Peripheral Function PA8 FlexBus DATA[8] DSPI_B CS4 None PA9 FlexBus DATA[9] DSPI_B CS3 None PG14 DSPI_B CS4 None None PG15 DSPI_B CS3 None None Table 34-49. Input Multiplexing Priority Priority Mode highest Primary Peripheral Mode medium Secondary Peripheral Mode lowest Tertiary Peripheral Mode |
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