MAC7200 datasheet(915/976 Pages) FREESCALE

915 / 976 page

Functional Description

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

837

34.7.4.2

Interrupts

When configured as a General Purpose Input (GPI), a pin may also be used to handle external edge

sensitive interrupts. This section describes how to use this functionality.

A pin may be used as an external interrupt by configuring the PIER and PULL[1:0] bits in the appropriate

CONFIGxx register as follows:

Detection of an external interrupt may be done in one of two ways:

•

Polling - You may choose to detect an external interrupt by continuously reading the CONFIGxx

pending external interrupts for the entire port. To use this method, clear the PIER bit in the

CONFIGxx register.

•

Interrupt Driven - If this method is chosen, by setting the PIER bit in the CONFIGxx register, a

system interrupt will be generated when an external interrupt occurs (with a minimum delay - See

Table 34-52). If so configured, this system interrupt can force the processor to take an exception,

where the interrupt may be cleared and serviced.

In either case, once an external interrupt has been recognized, it must be cleared before the next external

interrupt (i.e.-the next edge) will be recognized on that pin. This is done by writing a ’1’ to the PIFR bit in

the CONFIGxx register. Writing a ’0’ will not clear the interrupt flag.

There are two different ways in which interrupts can be organized in order to minimize the latency of the

interrupt service routine.

1. Place all external interrupts on a single port. If all interrupts are on a single port, then the exact

interrupt source can be determined by reading the Port Wide Interrupt Flag (PORTIFR) register for

that port.

2. Use multiple ports, but place only a single external interrupt on each port. In this scenarios, the

exact interrupt source can be determined by reading the Global Interrupt Status (GLBLINT)

Interrupts from all Ports are driven into a single interrupt on the Interrupt Controller (Interrupt

Request #61).

All 16 pins in each port have a glitch filter, clocked by the system clock, to filter out spurious interrupt

signals. Table 34-52 shows the minimum pulse width for an external interrupt/wakeup signal.

Table 34-51. Interrupt Polarity Configuration

Interrupt Type

PULL[1:0]

Active High (Rising Edge)

Active High with pull-down (Rising Edge)

Active Low (Falling Edge)

Active Low with pull-up (Falling Edge)

MAC7200 Datasheet(PDF) 915 Page - Freescale Semiconductor, Inc