MAC7200 datasheet(949/976 Pages) FREESCALE

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PLL Characteristics

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

871

A.9

PLL Characteristics

A.9.1

PLL Filter Characteristics

The oscillator provides the reference clock for the PLL. The voltage controlled oscillator (VCO) of the

PLL is also the system clock source in self clock mode. In order to operate reliably, care must be taken to

select proper values for external loop filter components.

Figure A-1. Basic PLL Functional Diagram

The procedure described below can be used to calculate the resistance and capacitance values using typical

values for KV (VCO Gain) and ich from Table A-15.

The phase detector relationship is given by:

Eqn. A-8

ich is the current in tracking mode. The loop bandwidth fC should be chosen to fulfill the Gardner’s stability

criteria by at least a factor of 10, a typical value for the stability factor is 50.

ζ = 0.9 ensures a good transient

response.

Eqn. A-9

And finally the frequency relationship is defined as

Eqn. A-10

With the above inputs the resistance can be calculated as:

Eqn. A-11

The capacitance CS can now be calculated as:

Eqn. A-12

The capacitance CP should be chosen in the range of:

Eqn. A-13

The stabilization delays shown in Table A-15 are dependent on PLL operational settings and external

component selection (for example, the crystal and XFC filter).

Example A-1. PLL calculations

KΦ

–

⋅

ζ f

REF

⋅⋅

πζ

()

⋅

-----------------------------------------

------

fREF

410

⋅

--------------

0.9

()

;

→

fVCO

fREF

------------2

SYNR

()

⋅

π n f

⋅⋅⋅

KΦ

----------------------------

⋅

π f

⋅⋅

---------------------

0.516

⋅

--------------

0.9

()

;

≈

≤≤

140

MHz

-------------

–

KΦ

510

–

⋅

–

140

MHz

-------------

–

⎝⎠

⎛⎞

⋅

700

-------

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