MAC7200 datasheet(953/976 Pages) FREESCALE

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Nexus Timing Specifications

MAC7200 Microcontroller Family Reference Manual, Rev. 2

Freescale Semiconductor

875

Figure A-3. General Purpose Output Timing Specifications

A.11

Nexus Timing Specifications

A.11.1

Nexus Inputs

Note that both the sole Nexus input, EVTI, is synchronized internally, so no setup or hold timings is

required. Consequently, the EVTI signal must be held for a minimum of two system clock cycles.

A.11.2

Nexus Outputs

Table A-22 lists Nexus Output timings, which are shown in Figure A-4.

NOTE

All Nexus output timings are synchronous; that is, input setup/hold and

output delay with respect to the falling edge of a reference clock. The

reference clock is the MCKO output. The RDY signal can be asserted while

MCKO is inactive.

All other timing relationships can be derived from these values.

D CLKOUT high to General Purpose Output valid

tCHPOV

—

D CLKOUT high to General Purpose Output invalid

tCHPOI

–2.0

—

1. Timing specifications apply to the “full slew rate” configuration for the pads.

Table A-21. Nexus Input Timing Specifications

Num

Rating

Symbol

Min

Typ

Max

Unit

D EVTI pulse width

tCYC

2—

—

tSYS

1. tSYS = 1/fSYS. See parameter C7.

Table A-20. General Purpose Output Timing Specifications (Continued)

Num

Rating1

Symbol

Min

Typ

Max

Unit

CLKOUT

Outputs

2.5V

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