AM3892 datasheet(46/299 Pages) TI

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AM3894

AM3892

SPRS681A – OCTOBER 2010 – REVISED MARCH 2011

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Table 3-2. DDR2/3 Memory Controller 0 Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2)

DESCRIPTION

NAME

NO.

DDR[0]_A[14]

D17

DVDD_DDR[0]

DDR[0]_A[13]

B16

DVDD_DDR[0]

DDR[0]_A[12]

N16

DVDD_DDR[0]

DDR[0]_A[11]

B13

DVDD_DDR[0]

DDR[0]_A[10]

C14

DVDD_DDR[0]

DDR[0]_A[9]

K13

DVDD_DDR[0]

DDR[0]_A[8]

N14

DVDD_DDR[0]

DDR[0]_A[7]

A14

DVDD_DDR[0]

DDR[0] Address Bus

DDR[0]_A[6]

L13

DVDD_DDR[0]

DDR[0]_A[5]

J13

DVDD_DDR[0]

DDR[0]_A[4]

H13

DVDD_DDR[0]

DDR[0]_A[3]

G13

DVDD_DDR[0]

DDR[0]_A[2]

D15

DVDD_DDR[0]

DDR[0]_A[1]

N17

DVDD_DDR[0]

DDR[0]_A[0]

A13

DVDD_DDR[0]

DDR[0]_D[31]

I/O

DVDD_DDR[0]

DDR[0]_D[30]

J11

I/O

DVDD_DDR[0]

DDR[0]_D[29]

C11

I/O

DVDD_DDR[0]

DDR[0]_D[28]

G10

I/O

DVDD_DDR[0]

DDR[0]_D[27]

I/O

DVDD_DDR[0]

DDR[0]_D[26]

B10

I/O

DVDD_DDR[0]

DDR[0]_D[25]

B11

I/O

DVDD_DDR[0]

DDR[0]_D[24]

I/O

DVDD_DDR[0]

DDR[0] Data Bus

DDR[0]_D[23]

I/O

DVDD_DDR[0]

DDR[0]_D[22]

I/O

DVDD_DDR[0]

DDR[0]_D[21]

I/O

DVDD_DDR[0]

DDR[0]_D[20]

I/O

DVDD_DDR[0]

DDR[0]_D[19]

I/O

DVDD_DDR[0]

DDR[0]_D[18]

H10

I/O

DVDD_DDR[0]

DDR[0]_D[17]

I/O

DVDD_DDR[0]

DDR[0]_D[16]

I/O

DVDD_DDR[0]

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