AM3892 datasheet(7/299 Pages) TI

7 / 299 page

AM3894

AM3892

www.ti.com

SPRS681A – OCTOBER 2010 – REVISED MARCH 2011

AM389x Revisions (continued)

SEE

ADDITIONS/MODIFICATIONS/DELETIONS

Section 7.3

Clocking:

Modified Figure 7-4, System Clocking Overview

Section 7.4.1

Interrupt Summary List:

Modified Table 7-17, Interrupts By Module

Section 7.4.2

Cortex™-A8 Interrupts:

Changed Interrupt Number 8 in Table 7-18, Cortex™-A8 Interrupt Controller Connections

Section 8.1.3

Timing Parameters and Board Routing Analysis:

Modified second paragraph

Section 8.3.2

Added new section: DDR3 Routing Guidelines

Section 8.4.3.2

JTAG Electrical Data/Timing:

Changed DPn/EMUn to EMUx in Parameter names and descriptions in Table 8-33, Switching Characteristics

Over Recommended Operating Conditions for STM Trace

Changed DPn/EMUn to EMUx in Figure 8-43, STM Trace Timing

Section 8.8

General-Purpose Memory Controller (GPMC) and Error Locator Module (ELM):

Modified chip selects list item

Section 8.8.1

GPMC and ELM Peripheral Register Descriptions:

Added Table 8-53, ELM Registers

Section 8.9.1.1

HDMI Interface Schematic:

Modified Figure 8-67, HDMI Interface High-Level Schematic

Section 8.9.1.2

TMDS Routing:

Modified second and third paragraphs

Section 8.9.1.3

DDC Signals:

Modified paragraph

Section 8.9.2

Added new section: HDMI Peripheral Register Descriptions

Section 8.10.2

HDVPSS Electrical Data/Timing:

Modified Figure 8-70, HDVPSS Output Timing

Section 8.12.2

McASP0, McASP1, and McASP2 Peripheral Register Descriptions:

Added PDIN (0x4803 801C/0x4803 C01C/0x4805 0100) and DIT (0x4803 8100/0x4803 C100/0x4805 0100 -

0x4803 815C/0x4803 C15C/0x4805 015C) registers to Table 8-77, McASP0/1/2 Registers

Section 8.14.1.3.2

Routing Specifications:

Modified paragraph

Section 8.15

Real-Time Clock (RTC):

Modified second paragraph

Section 8.17.1.4

Routing Specifications:

Modified first paragraph

Section 8.21.1

USB2.0 Peripheral Register Descriptions:

Changed address 0x4740 4004 to Reserved in Table 8-115, CPPI DMA Queue Manager Registers

Section 9.1.2

Device Nomenclature:

Modified section

Added Figure 9-1, Device Nomenclature

Contents

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